From 8c5592c48783f166e680401175f147ffe4d0f114 Mon Sep 17 00:00:00 2001 From: Wei Wang Date: Thu, 22 Oct 2020 10:23:00 +0800 Subject: [PATCH 2188/2944] Intel: perf/x86: Fix variable types for LBR registers to #31064126 commit 3cb9d5464c1ceea86f6225089b2f7965989cf316 upstream Backport summary: backport to kernel 4.19.57 for ICX perf topdown support The MSR variable type can be 'unsigned int', which uses less memory than the longer 'unsigned long'. Fix 'struct x86_pmu' for that. The lbr_nr won't be a negative number, so make it 'unsigned int' as well. Suggested-by: Peter Zijlstra (Intel) Signed-off-by: Wei Wang Signed-off-by: Peter Zijlstra (Intel) Link: https://lkml.kernel.org/r/20200613080958.132489-2-like.xu@linux.intel.com Signed-off-by: Yunying Sun Signed-off-by: Peng Wang Reviewed-by: Artie Ding --- arch/x86/events/perf_event.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h index db9f980..bbf6f70 100644 --- a/arch/x86/events/perf_event.h +++ b/arch/x86/events/perf_event.h @@ -660,8 +660,8 @@ struct x86_pmu { /* * Intel LBR */ - unsigned long lbr_tos, lbr_from, lbr_to; /* MSR base regs */ - int lbr_nr; /* hardware stack size */ + unsigned int lbr_tos, lbr_from, lbr_to, + lbr_nr; /* LBR base regs and size */ u64 lbr_sel_mask; /* LBR_SELECT valid bits */ const int *lbr_sel_map; /* lbr_select mappings */ bool lbr_double_abort; /* duplicated lbr aborts */ -- 1.8.3.1