From 09cf08424f013c9f43bf0017e3a09fd7cf5ffb38 Mon Sep 17 00:00:00 2001 From: Victor Ding Date: Tue, 27 Oct 2020 07:23:56 +0000 Subject: [PATCH 2662/2944] powercap: Add AMD Fam17h RAPL support to #33635199 commit 43756a298928c9a4e8201baaeb205c0c103728af upstream Enable AMD Fam17h RAPL support for the power capping framework. The support is as per AMD Fam17h Model31h (Zen2) and model 00-ffh (Zen1) PPR. Tested by comparing the results of following two sysfs entries and the values directly read from corresponding MSRs via /dev/cpu/[x]/msr: /sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj /sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj [ Artie: fixes conflicts in: arch/x86/include/asm/msr-index.h drivers/powercap/intel_rapl_common.c drivers/powercap/intel_rapl_msr.c ] Signed-off-by: Victor Ding Acked-by: Kim Phillips [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki Signed-off-by: Artie Ding Reviewed-by: Zelin Deng Reviewed-by: Shile Zhang Reviewed-by: Baolin Wang --- arch/x86/include/asm/msr-index.h | 1 + drivers/powercap/intel_rapl_common.c | 6 ++++++ drivers/powercap/intel_rapl_msr.c | 20 +++++++++++++++++++- 3 files changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index cd16b13..855f23c 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -251,6 +251,7 @@ #define MSR_PP1_POLICY 0x00000642 #define MSR_AMD_RAPL_POWER_UNIT 0xc0010299 +#define MSR_AMD_CORE_ENERGY_STATUS 0xc001029a #define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b /* Config TDP MSRs */ diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c index b624a88..068d202 100644 --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c @@ -950,6 +950,10 @@ static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value, .compute_time_window = rapl_compute_time_window_atom, }; +static const struct rapl_defaults rapl_defaults_amd = { + .check_unit = rapl_check_unit_core, +}; + static const struct x86_cpu_id rapl_ids[] __initconst = { INTEL_CPU_FAM6(SANDYBRIDGE, rapl_defaults_core), INTEL_CPU_FAM6(SANDYBRIDGE_X, rapl_defaults_core), @@ -989,6 +993,8 @@ static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value, INTEL_CPU_FAM6(XEON_PHI_KNL, rapl_defaults_hsw_server), INTEL_CPU_FAM6(XEON_PHI_KNM, rapl_defaults_hsw_server), + + X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd), {} }; diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c index 430b481..d4e2b65 100644 --- a/drivers/powercap/intel_rapl_msr.c +++ b/drivers/powercap/intel_rapl_msr.c @@ -47,6 +47,14 @@ .limits[RAPL_DOMAIN_PACKAGE] = 2, }; +static struct rapl_if_priv rapl_msr_priv_amd = { + .reg_unit = MSR_AMD_RAPL_POWER_UNIT, + .regs[RAPL_DOMAIN_PACKAGE] = { + 0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 }, + .regs[RAPL_DOMAIN_PP0] = { + 0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 }, +}; + /* Handles CPU hotplug on multi-socket systems. * If a CPU goes online as the first CPU of the physical package * we add the RAPL package to the system. Similarly, when the last @@ -129,7 +137,17 @@ static int rapl_msr_probe(struct platform_device *pdev) { int ret; - rapl_msr_priv = &rapl_msr_priv_intel; + switch (boot_cpu_data.x86_vendor) { + case X86_VENDOR_INTEL: + rapl_msr_priv = &rapl_msr_priv_intel; + break; + case X86_VENDOR_AMD: + rapl_msr_priv = &rapl_msr_priv_amd; + break; + default: + pr_err("intel-rapl does not support CPU vendor %d\n", boot_cpu_data.x86_vendor); + return -ENODEV; + } rapl_msr_priv->read_raw = rapl_msr_read_raw; rapl_msr_priv->write_raw = rapl_msr_write_raw; -- 1.8.3.1